Low Phosphorus Concentrations in Si by Diffusion from Doped Oxide Layers

The diffusion of phosphorus into silicon from doped oxide layers, deposited at low temperatures, has been studied in order to achieve reproducible impurity distributions with surface concentrations varying from 5 × 1015 to 1018 atoms/cm3. Special attention has been given to the differences arising from indiffusion in an N2 or in an O2 ambient. The dependence on the temperature of the diffusion coefficients of phosphorus in silicon and in silicon dioxide is determined at a surface concentration of 5 × 1016 atoms/cm3

In Situ Growth Rate Measurement of Selective LPCVD of Tungsten

The reflectance measurement during the selective deposition of W on Si covered with an insulator grating is proven tobe a convenient method to monitor the W deposition. The reflectance change during deposition allows the in situ measurementof the deposition rate. The influence of surface roughening due to either the W growth or an etching pretreatmentof the wafer is modeled, as well as the effect of selectivity loss and lateral overgrowth

A versatile micro-scale silicon sensor/actuator with low power consumption

We designed a CMOS compatible hot-surface silicon device operating at a power down to sub-µW. It has a pillarshaped structure with a nano-size (10-100 nm) conductive link between the electrodes separated by a SiO2 layer. The device is capable of maintaining a µm-size hot-surface area of several hundred degrees centigrade due to non-radiative recombination of carriers in a thin (13 nm) poly silicon surface layer. Such a device can be used as a light source, a heat source, as well as a sensitive detector of light and heat. As a direct application, we demonstrate the feasibility to perform as an adsorption-desorption sensor, and as a unit for activating chemisorption/decomposition (i.e. micro-reactor)

A pillar-shaped antifuse-based silicon chemical sensor and actuator

We designed a silicon-processing compatible, simple, and cheap device operating at a power down to sub- W. It has a pillar-shaped structure with a nanoscopic (10–100 nm in size) conductive link (the so-called antifuse) created between two electrodes separated by a SiO2 layer. The device exhibits a diode-like behavior due to the depletion effects in the mono-silicon pillar. The device is capable of maintaining a microscopic hot-surface area of several hundreds degrees centigrade. The size of the hot area and its temperature can be manipulated by the sign of the applied bias.\ud Two different heat-generation mechanisms (i.e., dissipation at a resistor and a non-radiative recombination of carriers) are proposed and modelled. Such a device can be used as a heat source, as a light source, and as a sensitive detector of light and heat. In this paper, we describe thermo-electrical properties of the fabricated devices and demonstrate their feasibility to perform as gas-, adsorption-, desorption sensors, and as units for activating chemisorption/decomposition of gaseous precursors, i.e., micro-reactors.\u

Strong efficiency improvement of SOI-LEDs through carrier confinement

Contemporary silicon light-emitting diodes in silicon-on-insulator (SOI) technology suffer from poor efficiency compared to their bulk-silicon counterparts. In this letter, we present a new device structure where the carrier injection takes place through silicon slabs of only a few nanometer thick. Its external quantum efficiency of 1.4 • 10−4 at room temperature, with a spectrum peaking at 1130 nm, is almost two orders higher than reported thus far on SOI. The structure diminishes the dominant role of nonradiative recombination at the n+ and p+contacts, by confining the injected carriers in an SOI peninsula.\ud With this approach, a compact infrared light source can be fabricated using standard semiconductor processing steps.\u

A novel approach to low-power hot-surface devices with decoupled electrical and thermal resistances

This work employs the idea of maintaining a hot surface by means of dissipating power at a nano-scale conductive link. The link is created between two polysilicon electrodes separated by a dielectric (a capacitor-like structure). From modelling, a link of 10 nm in diameter should be possible to maintain the surface temperature ranging between 750 and 1150 K within the surface diameter of 2 μm by absorbing a 3.3 mW of electric power. The devices can also be designed in such a way that the hot surface area is reduced to a sub-μm-size hotspot. The main advantage of the proposed idea is decoupling the electrical resistance and thermal resistance of the device. In this paper, two device structures based on antifuse technology are described. Both the thermo-electrical properties and feasibility to perform as a Pellistor-type gas sensor are discussed

Incubation Time Measurements in Thin-Film Deposition

Studies on the initial growth or nucleation of materials and research on selective deposition often mention an incubation time. Many techniques exist to determine the incubation time. The outcome can be very different for each technique when the same nucleation process is considered. For the first time we have given a simple model which shows that several incubation times can be expected if different methods are used. One of the most popular methods, plotting the mass or thickness as a function of time and defining the incubation time as the intercept on the x-axis, is not a good method. In particular, a meaningful incubation time is found only if a layer-by-layer growth mechanism occurs right from the start. Ellipsometry can be used in situ and is a much more sensitive method, but this technique needs more research to correlate the nucleation process with the data obtained using this technique. The determination of the nucleus density using scanning electron microscopy or atomic force microscope is the most accurate method, yet needs a lot of experiments. Without a detailed description of the measurement method the incubation time is a meaningless quantity

A High Efficiency Lateral Light Emitting Device on SOI

The infrared light emission of lateral p/sup +/-p-n/sup +/ diodes realized on SIMOX-SOI (separation by implantation of oxygen - silicon on insulator) substrates has been studied. The confinement of the free carriers in one dimension due to the buried oxide was suggested to be a key point to increase the band-to-band recombination probability in silicon light emitters. We found in our devices an external quantum efficiency comparable to previous results presented in the literature. The wavelength range of the emission was found to be 900-1300 nm which is common for indirect band to band recombination in Si. The SOI technology incorporates an insulating layer between the thin single crystal silicon layer and the much thicker substrate. This electrically insulating layer is also a thermal isolator and so self-heating effects are common in devices fabricated on SOI wafers. Investigation of its influence on the light emission and the light distribution in the device has been carried out in our research. In this paper, the characteristics of the device with different active region lengths were investigated and explained quantitatively based on the recombination rate of carriers inside the active area by using the simulation model in Silvaco